Building systems
that think and
scale.

A visual question answering system that grounds every answer in verifiable Prolog logic instead of trusting a black-box VLM. Perception runs locally — OWL-ViT zero-shot detection, CLIP attribute scoring, and geometric spatial relations build a pydantic-validated scene graph; an LLM only translates English into a Prolog query that SWI-Prolog executes deterministically.

Every wrong answer is traceable to a single stage, so failures are fixable rather than opaque. Scores 100% on a synthetic golden suite and 56% zero-shot on CLEVR with no fine-tuning, plus a step-by-step reasoning trace for every answer.

An RTL parse → match → action datapath that ingests Ethernet frames, parses headers (Ethernet → 802.1Q → IPv4 → TCP/UDP), classifies them against a register-programmed match table, and maintains per-rule packet counters — mirroring the shape of real switching silicon.

Paired with a board-agnostic C control plane that loads rules and reads counters over a generic register interface, with a single-sourced register map so RTL and software can't drift. Verified end-to-end in simulation with Verilator and self-checking testbenches; synthesizable with an AXI4-Lite path that's a one-file swap for hardware bring-up.

Implemented a character-level GPT language model from scratch in Rust using Hugging Face's Candle framework — porting Karpathy's Python/PyTorch architecture to a systems language.

Built core transformer components manually: multi-head causal self-attention, pre-norm blocks, residual connections, and layer norm via raw tensor ops for Apple Metal GPU compatibility. Trained a 4-layer, 4-head model on Tiny Shakespeare for 5,000 steps with AdamW.

Built a SQL-style database engine from scratch in C with persistent disk storage, structured page layouts, B+ tree index, page-level I/O with buffer pool, and write-ahead logging for crash recovery. Supports O(log n) key lookup across thousands of records.

Built a DDIM image generation model from scratch in PyTorch on CIFAR-10. Implemented the full pipeline: linear noise schedule, a U-Net with sinusoidal time embeddings, residual blocks with time conditioning, and self-attention at 16×16 and 4×4 resolutions.

Trained a 13.4M-parameter model (64 base channels, T=500) and documented capacity/quality tradeoffs vs. the paper's 53.5M config across 50k+ steps. Shipped the deterministic DDIM sampler (η=0) with η-sweep and consistency experiments — 50-step DDIM matches 500-step DDPM visually at ~10× the speed (1.7 s vs 16.8 s on M4 MPS).